5 Days Faculty Development Programme On Recent Advances In Signal Processing with AI And VLSI Design (RASPAIVD-2026) in Hybrid Mode

Event Date: 16 February 2026 – 20 February 2026

Event brief description

The Department of Electrical, Electronics and Communication Engineering, School of Engineering, Galgotias University, is organizing a 5-Day Faculty Development Programme (FDP) titled “Recent Advances in Signal Processing with AI And VLSI Design (RASPAIVD-2026)” in Hybrid Mode from 16th to 20th February 2026.

The FDP features distinguished resource persons from academia and industry to train faculty members, researchers, and post-graduate scholars on integrating Artificial Intelligence with Digital Signal Processing and implementing modern low-power, high-throughput VLSI hardware architectures.

This initiative directly aligns with the United Nations Sustainable Development Goals, specifically SDG 4 (Quality Education) and SDG 9 (Industry, Innovation, and Infrastructure), by fostering cutting-edge technical expertise, interdisciplinary research, and industry-relevant hardware design skills.

Event Detailed Description

A 5-day national-level Faculty Development Programme (FDP) on “Recent Advances in Signal Processing with AI And VLSI Design (RASPAIVD-2026)” is being organized in Hybrid Mode for academic professionals, researchers, and postgraduate students. The primary objective is to bridge classical Signal Processing methodologies with current AI/ML models and low-power VLSI design frameworks.

The programme covers key domain areas across five dedicated modules: Fundamentals of AI-convergent Signal Processing, AI-assisted Electronic Design Automation (EDA) workflows, Edge-AI Accelerator & NPU Architectures, Biomedical/Wireless Signal Acceleration, and Emerging Frontiers such as Neuromorphic and In-Memory Computing. Hands-on practical modules utilizing Python, MATLAB, Cadence/EDA suites, and FPGA hardware boards (Xilinx Vivado/PYNQ) are integrated into the daily technical schedules to ensure practical knowledge transfer.

The event will conclude with an evaluation, participant feedback, and a valedictory session led by the Head of Department, DEECE, and the faculty coordinators, recognizing participant achievements and encouraging research collaborations.

Department Name – Department of Electrical, Electronics and Communication Engineering, School of Engineering

Event Outcome 

Participants will gain hands-on proficiency in designing AI-driven signal processing workflows, hardware-software co-design using FPGAs, and modern VLSI physical design flow. The programme fosters interdisciplinary research capacity among educators and scholars, supporting SDG 4 (Quality Education) and SDG 9 (Industry, Innovation, and Infrastructure).

Related Goal